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A programmable FPGA-based cryptoprocessor for bilinear pairings over F2m., , , , and . ReCoSoC, page 1-8. IEEE, (2013)Hardware-software platform for computing irreducible testors., , , , and . Expert Syst. Appl., 39 (2): 2203-2210 (2012)Towards a reconfigurable hardware architecture for implementing a LDPC module suitable for software radio systems., , , and . Dynamically Reconfigurable Architectures, volume 10281 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2010)Introduction to the special section on FPGAs Technology and Applications., , and . Comput. Electr. Eng., (2016)Watermarking using similarities based on fractal codification., , and . Digit. Signal Process., 22 (2): 324-336 (2012)Using hashing and lexicographic order for Frequent Itemsets Mining on data streams., , , , , and . J. Parallel Distributed Comput., (2019)Processor arrays generation for matrix algorithms used in embedded platforms implemented on FPGAs., , and . Microprocess. Microsystems, 39 (7): 576-588 (2015)On an external memory scheme for processor arrays., , , and . IEICE Electron. Express, 10 (14): 20130324 (2013)Efficient implementation of the RDM-QIM algorithm in an FPGA., , , and . IEICE Electron. Express, 6 (14): 1064-1070 (2009)A fast hardware software platform for computing irreducible testors., , , , , and . Expert Syst. Appl., 42 (24): 9612-9619 (2015)