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Disambiguation of "Na, Taehui"

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An Offset-Canceling Triple-Stage Sensing Circuit for Deep Submicrometer STT-RAM.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (7): 1620-1624 (2014)

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Na Wei

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Na Li

 

Other publications of authors with the same name

Data-Cell-Variation-Tolerant Dual-Mode Sensing Scheme for Deep Submicrometer STT-RAM., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (1): 163-174 (2018)Offset-Canceling Current-Latched Sense Amplifier With Slow Rise Time Control and Reference Voltage Biasing Techniques., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (7): 2689-2699 (July 2023)Corner-Aware Dynamic Gate Voltage Scheme to Achieve High Read Yield in STT-RAM., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (9): 2851-2860 (2016)Multiple-Cell Reference Scheme for Narrow Reference Resistance Distribution in Deep Submicrometer STT-RAM., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (9): 2993-2997 (2016)STT-MRAM Sensing: A Review., , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (1): 12-18 (2021)An Offset-Tolerant Dual-Reference-Voltage Sensing Scheme for Deep Submicrometer STT-RAM., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (4): 1361-1370 (2016)Comparative Study of Various Latch-Type Sense Amplifiers., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (2): 425-429 (2014)Offset Voltage Analysis and Enable Signal Rise Time Control Based Offset Reduction Technique of Current-Latched Sense Amplifier.. ICEIC, page 1-2. IEEE, (2021)Robust Offset-Cancellation Sensing-Circuit-Based Spin-Transfer-Torque Nonvolatile Flip-Flop.. IEEE Access, (2020)Ternary Output Binary Neural Network With Zero-Skipping for MRAM-Based Digital In-Memory Computing.. IEEE Trans. Circuits Syst. II Express Briefs, 70 (7): 2655-2659 (July 2023)