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Communication Primitives for BSP Computers., and . Inf. Process. Lett., 58 (6): 303-310 (1996)Multi-Core - the Future of Embedded Systems.. MBMV, page 111-111. OFFIS-Institut für Informatik, (2011)Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU., , , , , , , and . Signal Process. Image Commun., (2018)Implementing Hardware Multithreading in a VLIW Architecture., and . IASTED PDCS, page 674-679. IASTED/ACTA Press, (2005)Scalable Parallel Programming Applied to H.264/AVC Decoding., , , , , and . Springer Briefs in Computer Science Springer, (2012)Parallel HEVC Decoding on Multi- and Many-core Architectures - A Power and Performance Analysis., , , , and . J. Signal Process. Syst., 71 (3): 247-260 (2013)Local memory-aware kernel perforation., , and . CGO, page 278-287. ACM, (2018)Reducing traffic generated by conflict misses in caches., and . Conf. Computing Frontiers, page 235-239. ACM, (2004)Dynamic techniques to reduce memory traffic in embedded systems., and . Conf. Computing Frontiers, page 192-201. ACM, (2004)A Quantitative Study of Locality in GPU Caches for Memory-Divergent Workloads., , and . Int. J. Parallel Program., 50 (2): 189-216 (2022)