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Bisimulation on speed: Lower time bounds., и . RAIRO Theor. Informatics Appl., 39 (3): 587-618 (2005)Signal transition graph decomposition: internal communication for speed independent circuit implementation., , , и . IET Comput. Digit. Tech., 5 (6): 440-451 (2011)Testing Preorders for dMTS: Deadlock- and the New Deadlock-/DivergenceTesting., , и . ACM Trans. Embed. Comput. Syst., 16 (2): 41:1-41:28 (2017)Failure Semantics for Modal Transition Systems., и . ACM Trans. Embed. Comput. Syst., 14 (4): 67:1-67:30 (2015)Fairness and Partial Order Semantics.. Inf. Process. Lett., 55 (1): 33-39 (1995)ACTL for Modal Interface Automata., и . Theor. Comput. Sci., (2017)A Short STory on Action Refinement.. Foundations of Computer Science: Potential - Theory - Cognition, том 1337 из Lecture Notes in Computer Science, стр. 271-278. Springer, (1997)Relating Fairness and Timing in Process Algebras., , и . CONCUR, том 2761 из Lecture Notes in Computer Science, стр. 438-452. Springer, (2003)Modal Interface Automata., и . IFIP TCS, том 7604 из Lecture Notes in Computer Science, стр. 265-279. Springer, (2012)Failures Semantics and Deadlocking of Modular Petri Nets.. MFCS, том 324 из Lecture Notes in Computer Science, стр. 542-551. Springer, (1988)