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Disambiguation of "Fujita, Masahiro"

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Performance Estimation with Automatic False-Path Detection for System-Level Designs.

, , and . IPSJ Trans. Syst. LSI Des. Methodol., (2010)

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Toko Fujita

Masahiro Noguchi

Buntaro Fujita

Masahiro Ogawa

Masayuki Fujita

 

Other publications of authors with the same name

VERIFUL: VERIfication using FUnctional Learning., , and . ED&TC, page 444-448. IEEE Computer Society, (1995)LUT-based Arithmetic Circuit Approximation with Formal Guarantee on Worst Case Relative Error., , , and . LATS, page 1-2. IEEE, (2023)Simultaneous Circuit Transformation and Routing., , , and . ASP-DAC/VLSI Design, page 479-483. IEEE Computer Society, (2002)Synthesis of LUT Based Approximating Adder Circuits with Formal Error Guarantees., , , and . VDAT, volume 1687 of Communications in Computer and Information Science, page 435-449. Springer, (2022)On More Efficient Combinational ATPG Using Functional Learning., , , , and . VLSI Design, page 107-110. IEEE Computer Society, (1996)Distributed Particle-Based Rendering Framework for Large Data Visualization on HPC Environments., , , , , and . HPCS, page 300-307. IEEE, (2017)Automatic assertion extraction in gate-level simulation using GPGPUs., , and . ICCD, page 522-523. IEEE Computer Society, (2012)Efficient variable ordering using aBDD based sampling., , , and . DAC, page 687-692. ACM, (2000)A Post-Silicon Debug Support Using High-Level Design Description., , , and . Asian Test Symposium, page 137-142. IEEE Computer Society, (2009)Kinetic analysis in human brain of 11C(R)-rolipram, a positron emission tomographic radioligand to image phosphodiesterase 4: A retest study and use of an image-derived input function., , , , , , , , and . NeuroImage, 54 (3): 1903-1909 (2011)