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HELLO: improved neural network architectures and methodologies for small variant calling., , , and . BMC Bioinform., 22 (1): 404 (2021)Capacity-Efficient Protection with Fast Recovery in Optically Transparent Mesh Networks., and . BROADNETS, page 290-299. IEEE Computer Society, (2004)A Task-Centric Memory Model for Scalable Accelerator Architectures., , , , and . PACT, page 77-87. IEEE Computer Society, (2009)A recurrent Markov state-space generative model for sequences., , , and . AISTATS, volume 89 of Proceedings of Machine Learning Research, page 3070-3079. PMLR, (2019)Implicitly Parallel Programming Models for Thousand-Core Microprocessors., , , , , , , , , and 4 other author(s). DAC, page 754-759. IEEE, (2007)Cohesion: An Adaptive Hybrid Memory Model for Accelerators., , , , and . IEEE Micro, 31 (1): 42-55 (2011)CASES 2007 guest editors' introduction., and . Des. Autom. Embed. Syst., 13 (1-2): 89 (2009)Rigel: A 1, 024-Core Single-Chip Accelerator Architecture., , , , , and . IEEE Micro, 31 (4): 30-41 (2011)Implementing a GPU Programming Model on a Non-GPU Accelerator Architecture., , , , , and . ISCA Workshops, volume 6161 of Lecture Notes in Computer Science, page 40-51. Springer, (2010)Continuous Optimization., , , and . ISCA, page 86-97. IEEE Computer Society, (2005)