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A Methodology for Guided Behavioral-Level Optimization.

, , и . DAC, стр. 309-314. ACM Press, (1998)

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Gaëlle Lisack

Oleg Lisagor

Hamel Lisa

Jacob Lisakafu

Mateusz Lisaj

 

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Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification., , , , , и . DAC, стр. 964-969. ACM Press, (1999)An integrated system for rapid prototyping of high performance algorithm specific data paths., , , , , и . ASAP, стр. 134-148. IEEE, (1992)Concurrency characteristics in DSP programs., , и . ICASSP (2), стр. 433-436. IEEE Computer Society, (1994)High level synthesis for reconfigurable datapath structures., , и . ICCAD, стр. 26-29. IEEE Computer Society / ACM, (1993)A Methodology for Guided Behavioral-Level Optimization., , и . DAC, стр. 309-314. ACM Press, (1998)Design guidance in the power dimension., , и . ICASSP, стр. 2837-2840. IEEE Computer Society, (1995)Logic Optimization with Multi-Output Gates., , и . ICCD, стр. 416-420. IEEE Computer Society, (1993)A partitioning scheme for optimizing interconnect power., , и . IEEE J. Solid State Circuits, 32 (3): 433-443 (1997)Instruction set mapping for performance optimization., , , , и . ICCAD, стр. 518-521. IEEE Computer Society / ACM, (1993)Heterogeneous BISR techniques for yield and reliability enhancement using high level synthesis transformations., , и . ASAP, стр. 454-465. IEEE, (1993)