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An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems.

, , , , , , and . DAC, page 157:1-157:6. ACM, (2016)

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Neural network accelerator for quantum control., , , , , , and . CoRR, (2022)Model-driven design and validation of embedded software., , , , , , and . AST, page 98-104. ACM, (2011)An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems., , , , , , and . DAC, page 157:1-157:6. ACM, (2016)Accurate profiling of oracles for self-checking time-constrained embedded software., , , and . HLDVT, page 96-99. IEEE Computer Society, (2012)FATE: a Functional ATPG to Traverse Unstabilized EFSMs., , , and . ETS, page 179-184. IEEE Computer Society, (2006)Broadening the exploration of the accelerator design space in embedded scalable platforms., , , and . HPEC, page 1-7. IEEE, (2017)Automatic generation of compact formal properties for effective error detection., , and . CODES+ISSS, page 28:1-28:10. IEEE, (2013)Combining dynamic slicing and mutation operators for ESL correction., , , , , , , and . European Test Symposium, page 1-6. IEEE Computer Society, (2012)HIFSuite: Tools for HDL Code Conversion and Manipulation., , , , , , and . EURASIP J. Embed. Syst., (2010)Improving high-level and gate-level testing with FATE: A functional automatic test pattern generator traversing unstabilised extended FSM., , , and . IET Comput. Digit. Tech., 1 (3): 187-196 (2007)