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Disambiguation of "Dalton, Damian"

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A Generic Timing Mechanism for Using the APPLES Gate-Level Simulator in a Mixed-Level Simulation Environment.

, , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 799-808. Springer, (2004)

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Dalton Macaulay

Damian Hecker

Damian Kopyto

Damian Dombrowski

Damian Blumenröder

 

Other publications of authors with the same name

Searching Extended IP-XACT Components for SoC Design Based on Requirements Similarity., , , , , , and . IEEE Syst. J., 5 (1): 70-79 (2011)Reducing the Communication Bottleneck via On-Chip Cosimulation of Gate-Level HDL and C-Models on a Hardware Accelerator., , , , and . ISVLSI, page 290-291. IEEE Computer Society, (2005)Automated simulation-based verification of power requirements for Systems-on-Chips., , , , , and . DDECS, page 8-11. IEEE Computer Society, (2010)Parallel Simulation with a Generic Simulation Framework Featuring Loose Coupling., , , and . ICPP Workshops, page 251-257. IEEE Computer Society, (2005)A Generic Timing Mechanism for Using the APPLES Gate-Level Simulator in a Mixed-Level Simulation Environment., , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 799-808. Springer, (2004)Avoiding Conventional Overheads in Parallel Logic Simulation: A New Architecture.. HiPC, volume 1745 of Lecture Notes in Computer Science, page 364-370. Springer, (1999)A New Timing Mechanism Architecture for Discrete Logic Event Simulation.. PDPTA, page 1236-1242. CSREA Press, (1999)Analysis of an Associative Array Parallel Logic Simulator.. ICPP Workshops, page 308-312. IEEE Computer Society, (1999)APPLES: A Full Gate-Timing FPGA-Based Hardware Simulator., , , , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 1162-1165. Springer, (2003)An IP-XACT Library extended with verification information for functionality-based component selection., , , , , , and . Elektrotech. Informationstechnik, 127 (4): 109-113 (2010)