( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
A novel unified dummy fill insertion framework with SQP-based optimization method.

, , , , , и . ICCAD, стр. 88. ACM, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Changhao Jin

Yan Yan

Shanshan Yan

Americanization in China: an analysis of General Motors and its strategies in China. Uni Mainz, (2009)

Yan Xu

Untersuchungen zur Verleimung von Holz und Holzspanplatten mit UF-Leimharzen und PMDI. TU Braunschweig, (2009)

Yan Xu

 

Другие публикации лиц с тем же именем

An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble., , , , и . CoRR, (2021)Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data., , , , и . DATE, стр. 1417-1422. IEEE, (2016)An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits., , , , , , , и . DAC, стр. 1-6. IEEE, (2020)Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method., , и . ASP-DAC, стр. 844-849. IEEE, (2006)Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network., , , , , и . DATE, стр. 1463-1468. IEEE, (2019)A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion., , , , , и . ISCAS, стр. 2886-2890. IEEE, (2022)LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces., , , , и . MLCAD, стр. 27-34. ACM / IEEE, (2022)Efficient High-Level Synthesis of Approximate Computing Circuits via Multi-fidelity Modeling., , , и . ASICON, стр. 1-4. IEEE, (2021)cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis., , , , , , , , , и . DAC, стр. 1-6. IEEE, (2023)Layout decomposition with pairwise coloring for multiple patterning lithography., , , , и . ICCAD, стр. 170-177. IEEE, (2013)