( en | de | ru )

 

Disambiguation of "Lee, Ganghee"

Author of the publication

copydeleteadd this publication to your clipboard
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design.

, , , , and . DATE, page 20132-20137. IEEE Computer Society, (2003)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Xavier Lee Lee

Bongsoo Lee

The role of negative regulators in coordination of the Myxococcus xanthus developmental program. Uni Marburg, (2009)

Min-Hi Lee

Induction and regulation of antiviral defence mechanisms through intracytoplasmic sensors. HU Berlin, (2009)

Clara Lee

Viktor Lee

 

Other publications of authors with the same name

Coarse-grained reconfigurable architecture for multiple application domains: a case study., , , , , , and . ICHIT, volume 321 of ACM International Conference Proceeding Series, page 546-553. ACM, (2009)Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems., , , , , and . ACM Trans. Reconfigurable Technol. Syst., 11 (1): 4:1-4:23 (2018)From C to Fault-Tolerant FPGA-Based Systems., , , , and . FCCM, page 212. IEEE Computer Society, (2018)Automatic mapping of control-intensive kernels onto coarse-grained reconfigurable array architecture with speculative execution., , and . IPDPS Workshops, page 1-4. IEEE, (2010)Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable Architectures., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (5): 637-650 (2011)Communication architecture design for reconfigurable multimedia SoC platform., , , , , and . Des. Autom. Embed. Syst., 14 (1): 1-20 (2010)Automatic Bus Matrix Synthesis based on Hardware Interface Selection for Fast Communication Design Space Exploration., , , and . ICSAMOS, page 50-57. IEEE, (2007)Software-Level Approaches for Tolerating Transient Faults in a Coarse-GrainedReconfigurable Architecture., , and . IEEE Trans. Dependable Secur. Comput., 11 (4): 392-398 (2014)SoCDAL: System-on-chip design AcceLerator., , , , , , and . ACM Trans. Design Autom. Electr. Syst., 13 (1): 17:1-17:38 (2008)Fault Recovery Time Analysis for Coarse-Grained Reconfigurable Architectures., , and . ACM Trans. Embed. Comput. Syst., 17 (2): 42:1-42:21 (2018)