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A New Angle Set-Based Absolute Scaling-free Reconfigurable Cordic Algorithm.

, , and . Circuits Syst. Signal Process., 42 (12): 7404-7432 (December 2023)

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An input test pattern for characterization of a full-adder and n-bit ripple carry adder., and . ICACCI, page 250-255. IEEE, (2016)A low-power high-speed hybrid full adder., and . VDAT, page 1-2. IEEE, (2016)A Comparative Study on CORDIC Algorithms and Applications., , and . J. Circuits Syst. Comput., 32 (5): 2330002:1-2330002:47 (March 2023)Mixed-radix, virtually scaling-free CORDIC algorithm based rotator for DSP applications., , and . Integr., (2021)FPGA implementation of high-performance, resource-efficient Radix-16 CORDIC rotator based FFT algorithm., , and . Integr., (2020)Bayesian Memory, a Possible Hardware Building Block for Intelligent Systems., and . AAAI Fall Symposium: Biologically Inspired Cognitive Architectures, volume FS-08-04 of AAAI Technical Report, page 81. AAAI, (2008)A New Angle Set-Based Absolute Scaling-free Reconfigurable Cordic Algorithm., , and . Circuits Syst. Signal Process., 42 (12): 7404-7432 (December 2023)Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions., , and . VDAT, volume 711 of Communications in Computer and Information Science, page 15-23. Springer, (2017)Improving the performance of transmission gate and hybrid CMOS Full Adders in chain and tree structure architectures., , and . Integr., (2019)Experiments with Multinational Cross-Course Project., , , and . TALE, page 570-575. IEEE, (2020)