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On the design of an FPGA-based OFDM modulator for IEEE 802.16-2004.

, and . ReConFig, IEEE Computer Society, (2005)

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Parallel Hardware/Software Architecture for the BWT and LZ77 Lossless Data Compression Algorithms., , and . Computación y Sistemas, (2006)Design and Implementation of a CFAR Processor for Target Detection., , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 943-947. Springer, (2004)Fusion center with neural network for target detection in background clutter., and . ENC, page 189-197. IEEE Computer Society, (2005)A Hybrid Approach for Target Detection Using CFAR Algorithm and Image Processing., , and . ENC, page 108-115. IEEE Computer Society, (2004)An FPGA-based parallel sorting architecture for the Burrows Wheeler transform., , and . ReConFig, IEEE Computer Society, (2005)Hardware Acceleration of Frequent Itemsets Mining on Data Streams., , , and . Res. Comput. Sci., (2014)On the design and implementation of a control system processor.. Loughborough University, UK, (2001)British Library, EThOS.On the design of an FPGA-based OFDM modulator for IEEE 802.16-2004., and . ReConFig, IEEE Computer Society, (2005)Watermarking Based on Iterated Function Systems., , , and . ENC, page 339-344. IEEE Computer Society, (2009)