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A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer.

J. Um, Y. Kim, S. Cho, M. Chae, B. Kim, J. Sim, and H. Park. IEEE Trans. Biomed. Circuits Syst., 9 (1): 138-151 (2015)

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June Park

Hong-June Kuo

Hong-Yang Park

Hong-Suck Park

Joo-Hong Park

Other publications of authors with the same name

A CMOS transceiver for DRAM bus system with a demultiplexed equalization scheme.J. Sim, J. Nam, Y. Sohn, H. Park, C. Kim, and S. Cho. IEEE J. Solid State Circuits, 37 (2): 245-250 (2002)Analysis and prevention of DRAM latch-up during power-on.Y. Kim, J. Sim, H. Park, J. Doh, K. Park, H. Chung, J. Oh, C. Oh, and S. Ahn. IEEE J. Solid State Circuits, 32 (1): 79-85 (1997)A three-data differential signaling over four conductors with pre-emphasis and equalization: a CMOS current mode implementation.S. Choi, H. Lee, and H. Park. IEEE J. Solid State Circuits, 41 (3): 633-641 (2006)A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip Lines.H. Jung, I. Yi, S. Lee, J. Sim, and H. Park. IEEE J. Solid State Circuits, 47 (9): 2068-2079 (2012)An Approximate Closed-Form Channel Model for Diverse Interconnect Applications.M. Choi, J. Sim, H. Park, and B. Kim. IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (10): 3034-3043 (2014)An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects.M. Choi, J. Sim, H. Park, and B. Kim. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (5): 1335-1344 (2015)5-Gb/s Peak Detector Using a Current Comparator and a Three-State Charge Pump.J. Kim, J. Shin, J. Sim, and H. Park. IEEE Trans. Circuits Syst. II Express Briefs, 58-II (5): 269-273 (2011)A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier.Y. Suh, J. Lee, B. Kim, H. Park, and J. Sim. IEEE Trans. Circuits Syst. II Express Briefs, 60-II (3): 142-146 (2013)A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface.S. Lee, B. Kim, H. Park, and J. Sim. IEEE Trans. Circuits Syst. II Express Briefs, 60-II (2): 91-95 (2013)A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL.H. Chi, Y. Choi, S. Lee, J. Sim, H. Park, J. Lim, P. Kang, B. Lee, J. Hong, and H. Lee. IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 687-691 (2011)

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Disambiguation of "Park, Hong-June"