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Disambiguation of "López, Juan A."

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Fast characterization of the noise bounds derived from coefficient and signal quantization.

, , , and . ISCAS (4), page 309-312. IEEE, (2003)

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Juan López-Pila

Juan López Gejo

Juan Antonio Cuéllar López

Juan Manuel Salgado López

Juan Miguel Rodríguez López

 

Other publications of authors with the same name

Fast characterization of the noise bounds derived from coefficient and signal quantization., , , and . ISCAS (4), page 309-312. IEEE, (2003)Bit-Width Selection for Data-Path Implementations., , and . ISSS, page 114-121. ACM / IEEE Computer Society, (1999)High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs., , , and . FPL, page 1-4. IEEE, (2006)Any-Radix Efficient Fully-Parallel Implementation of the Fast Fourier Transform on FPGAs., and . DCIS, page 1-6. IEEE, (2023)High-speed systolic array for gene matching., , , , and . FPGA, page 248. ACM, (2004)Fast Fixed-Point Optimization of DSP Algorithms., , , and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 182-205. Springer, (2010)Optimized Architectural Synthesis of Fixed-Point Datapaths., , , , and . ReConFig, page 85-90. IEEE Computer Society, (2008)Optimized Synthesis of DSP Cores Combining Logic-based and Embedded FPGA Resources., , , and . SoC, page 1-4. IEEE, (2006)Analysis of limit cycles by means of affine arithmetic computer-aided tests., , , and . EUSIPCO, page 991-994. IEEE, (2004)SQNR estimation of non-linear fixed-point algorithms., , , and . EUSIPCO, page 522-526. IEEE, (2010)