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Disambiguation of "Ranganathan, Nagarajan"

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A Framework for Power-Gating Functional Units in Embedded Microprocessors.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (11): 1640-1649 (2009)

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Hiranmayi Ranganathan

Sujatha Nagarajan

Vijayasarathi Nagarajan

Manju Nagarajan

Nagarajan Elumalai

 

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Variation-aware multimetric optimization during gate sizing., , and . ACM Trans. Design Autom. Electr. Syst., 14 (4): 54:1-54:30 (2009)A Novel Control-flow based Intrusion Detection Technique for Big Data Systems., and . CoRR, (2016)Reliability-centric gate sizing with simultaneous optimization of soft error rate, delay and power., and . ISLPED, page 99-104. ACM, (2008)A high speed systolic architecture for labeling connected components in an image., , and . IEEE Trans. Syst. Man Cybern., 25 (3): 415-423 (1995)A framework for energy and transient power reduction during behavioral synthesis., and . IEEE Trans. Very Large Scale Integr. Syst., 12 (6): 562-572 (2004)Transient power minimization through datapath scheduling in multiple supply voltage environment., , and . ICECS, page 300-303. IEEE, (2003)Efficient reversible NOR gates and their mapping in optical computing domain., , and . Microelectron. J., 45 (6): 825-834 (2014)DFLAP: a dynamic frequency linear array processor., , and . ICIP (2), page 1007-1010. IEEE Computer Society, (1996)Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits., , and . VLSID, page 545-550. IEEE Computer Society, (2014)Forward Body Biased Adiabatic Logic for Peak and Average Power Reduction in 22nm CMOS., and . VLSID, page 470-475. IEEE Computer Society, (2014)