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Disambiguation of "Nakata, Tsuneo"

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A Method of Static Compaction of Test Stimuli.

, , and . Asian Test Symposium, page 137-144. IEEE Computer Society, (2001)

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Tsuneo Usuki

Tsuneo Someya

 

Other publications of authors with the same name

Precise Location by Fingerprinting Road Segments with Variation of Wireless Reception., and . VTC Spring, page 1-5. IEEE, (2014)CTL model checking based on forward state traversal., , and . ICCAD, page 82-87. IEEE Computer Society / ACM, (1996)Automatic test program generation for pipelined processors., , , and . ICCAD, page 580-583. IEEE Computer Society / ACM, (1994)An approach to verify a large scale system-on-a-chip using symbolic model checking., , , and . ICCD, page 308-313. IEEE Computer Society, (1998)Dataflow Analysis for Resource Contention and Register Leakage Properties., , and . VLSI Design, page 418-423. IEEE Computer Society, (2000)A Method of Static Compaction of Test Stimuli., , and . Asian Test Symposium, page 137-144. IEEE Computer Society, (2001)System-on-chip validation using UML and CWL., , , and . CODES+ISSS, page 92-97. ACM, (2004)Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract)., , , , and . ASP-DAC/VLSI Design, page 11-13. IEEE Computer Society, (2002)Formal verification based on assume and guarantee approach - a case study (short paper)., , and . ASP-DAC, page 77-80. ACM, (2000)An Object-Oriented Design Process for System-on-Chip Using UML., , , , and . ISSS, page 249-254. ACM / IEEE Computer Society, (2002)