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Invited: Chipyard - An Integrated SoC Research and Implementation Environment., , , , , , , , , and 8 other author(s). DAC, page 1-6. IEEE, (2020)Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration., , , , , , , , , and 9 other author(s). DAC, page 769-774. IEEE, (2021)Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs., , , , , , , , , and 7 other author(s). IEEE Micro, 40 (4): 10-21 (2020)Microprocessor chip with photonic I/O., , , , , , , , , and 12 other author(s). OFC, page 1-3. IEEE, (2017)4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET., , , , , , , , , and 2 other author(s). ISSCC, page 58-60. IEEE, (2021)Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs., , , , and . ISCAS, page 1-5. IEEE, (2021)FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design., , , , , , and . ASPLOS, page 715-731. ACM, (2020)ASPLOS 2020 was canceled because of COVID-19..