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Optimizing Reconfigurable Recurrent Neural Networks., , , , , , , and . FCCM, page 10-18. IEEE, (2020)Simple and effective complementary label learning based on mean square error loss., , , , and . Mach. Vis. Appl., 34 (6): 118 (November 2023)Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator., , , , , , and . ASP-DAC, page 250-255. IEEE, (2022)Memory-Efficient Architecture for Accelerating Generative Networks on FPGA., , , , , , , and . FPT, page 30-37. IEEE, (2018)Towards Overlay-based Rapid In-Circuit Tuning of Deep Learning Designs., , , , , and . FPT, page 301. IEEE, (2020)A Reconfigurable Multithreaded Accelerator for Recurrent Neural Networks., , , , , , , and . FPT, page 20-28. IEEE, (2020)Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation., , , , , and . FPL, page 287-294. IEEE Computer Society, (2018)Efficient Weight Reuse for Large LSTMs., , , , , , and . ASAP, page 17-24. IEEE, (2019)High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point., , , , and . IEEE Trans. Neural Networks Learn. Syst., 34 (8): 4473-4487 (August 2023)Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs., , , , , and . IEEE Trans. Neural Networks Learn. Syst., 33 (8): 3974-3987 (2022)