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Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA.

T. Brückner, M. Lorenz, C. Zorn, J. Becker, W. Mathis, and M. Ortmanns. IEEE Trans. Circuits Syst. II Express Briefs, 59-II (8): 471-475 (2012)

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Joachim Becker

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Analysis and design of high speed/high linearity continuous time delta-sigma modulator.C. Chu, T. Brückner, J. Kauffman, J. Anders, J. Becker, and M. Ortmanns. ISCAS, page 1268-1271. IEEE, (2013)Comparison Study of Integrated Potentiostats: Resistive-TIA, Capacitive-TIA, CT ΣΔ Modulator.M. Rajabzadeh, D. Djekic, M. Haeberle, J. Becker, J. Anders, and M. Ortmanns. ISCAS, page 1-5. IEEE, (2018)A bidirectional neural interface with a HV stimulator and a LV neural amplifier.U. Bihr, T. Ungru, H. Xu, J. Anders, J. Becker, and M. Ortmanns. ISCAS, page 401-404. IEEE, (2013)Evaluation of single-bit sigma-delta modulator DAC for electrical impedance spectroscopy.M. Rajabzadeh, J. Becker, and M. Ortmanns. BioCAS, page 1-4. IEEE, (2017)A 1.92-GS/s CT ΔΣ modulator with 70-db DR and 78-db SFDR in 15-MHz bandwidth.C. Chu, J. Kauffman, J. Anders, J. Becker, M. Ortmanns, M. Epp, and S. Chartier. NEWCAS, page 480-483. IEEE, (2014)Enhanced Arbiter PUFs using custom sized structures for reduced noise sensitivity.A. Herkle, M. Schuster, J. Becker, and M. Ortmanns. ICECS, page 568-571. IEEE, (2016)An AC-powered optical receiver consuming 270μW for transcutaneous 2Mb/s data transfer.S. Lange, H. Xu, C. Lang, H. Pless, J. Becker, H. Tiedkte, E. Hennig, and M. Ortmanns. ISSCC, page 304-306. IEEE, (2011)Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA.T. Brückner, M. Lorenz, C. Zorn, J. Becker, W. Mathis, and M. Ortmanns. IEEE Trans. Circuits Syst. II Express Briefs, 59-II (8): 471-475 (2012)A GP algorithm for efficient synthesis of GM-C filters on a hexagonal FPAA structure.S. Trendelenburg, J. Becker, F. Henrici, and Y. Manoli. GECCO, page 295-296. ACM, (2008)A 32-ch Neuromodulator with redundant Voltage Monitors avoiding Blocking Capacitors.S. Reich, M. Sporer, J. Becker, S. Rieger, M. Schüttler, and M. Ortmanns. ESSCIRC, page 201-204. IEEE, (2022)

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Disambiguation of "Becker, Joachim"

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Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA.

Please choose a person to relate this publication to

Joachim Becker

Joachim Becker

Joachim Becker

Joachim Becker

Joachim Becker

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Becker, Joachim"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA.

Please choose a person to relate this publication to

Joachim Becker

Joachim Becker

Joachim Becker

Joachim Becker

Joachim Becker

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA.