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A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals., , , и . VLSI-SOC, том 218 из IFIP Conference Proceedings, стр. 51-62. Kluwer, (2001)VLSI high level synthesis of fast exact least mean square algorithms based on fast FIR filters., , , и . ICASSP, стр. 671-674. IEEE Computer Society, (1997)Approximate nanophotonic interconnects., , , и . NOCS, стр. 9:1-9:7. ACM, (2019)DART: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints., , , и . IPDPS, IEEE Computer Society, (2002)Asynchronous timing model for high-level synthesis of DSP applications., , и . EUSIPCO, стр. 1-4. IEEE, (1998)Memory aspects in signal processing and HLS tool: Some results., , , и . EUSIPCO, стр. 1-4. IEEE, (1996)Teaching hardware/software system codesign using CAD tools: a case study in image synthesis., , , и . IEEE Trans. Educ., 43 (3): 277-283 (2000)Structure mémoire reconfigurable. Vers une structure de stockage faible consommation., , , и . Technique et Science Informatiques, 27 (1-2): 181-202 (2008)Open-People: Open Power and Energy Optimization PLatform and Estimator.. PATMOS, том 6448 из Lecture Notes in Computer Science, стр. 251. Springer, (2010)Mesh and Fat-Tree comparison for dynamically reconfigurable applications., , , и . ReCoSoC, том 7551 из KIT Scientific Reports, стр. 157-160. KIT Scientific Publishing, (2010)