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Disambiguation of "Peddersen, Jorgen"

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A double-width algorithmic balancing to prevent power analysis Side Channel Attacks in AES.

, , , and . ISVLSI, page 76-83. IEEE Computer Socity, (2013)

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Jörgen Norén

Jörgen Haalck

Jörgen Hansen

Jörgen Foith

Jörgen Ringenberg

 

Other publications of authors with the same name

MASHfifo: A Hardware-Based Multiple Cache Simulator for Rapid FIFO Cache Analysis., , and . DAC, page 200:1-200:6. ACM, (2014)CIPARSim: Cache intersection property assisted rapid single-pass FIFO cache simulation technique., , and . ICCAD, page 126-133. IEEE Computer Society, (2011)CIPARSim: Cache Intersection Property Assisted Rapid Single-pass FIFO Cache Simulation Technique., , and . CoRR, (2015)CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time., and . ASP-DAC, page 890-895. IEEE Computer Society, (2007)Energy Driven Application SelfAdaptation., and . VLSI Design, page 385-390. IEEE Computer Society, (2007)DRMA: dynamically reconfigurable MPSoC architecture., , , , , , and . ACM Great Lakes Symposium on VLSI, page 239-244. ACM, (2013)Low-Impact Processor for Dynamic Runtime Power Management., and . IEEE Des. Test Comput., 25 (1): 52-62 (2008)Realizing Cycle Accurate Processor Memory Simulation via Interface Abstraction., , and . VLSI Design, page 141-146. IEEE Computer Society, (2011)Improved Architectures for Range Encoding in Packet Classification System., , and . NCA, page 10-19. IEEE Computer Society, (2010)LOP: a novel SRAM-based architecture for low power and high throughput packet classification., , and . CODES+ISSS, page 137-146. ACM, (2009)