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Enhancing power analysis attacks against cryptographic devices., , , , and . ISCAS, IEEE, (2006)Delay-based dual-rail pre-charge logic., , , , and . ICECS, page 53-56. IEEE, (2009)Differential Capacitance Analysis., , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 338-347. Springer, (2008)A high speed truly IC random number source for smart card microcontrollers., , , , , and . ICECS, page 239-242. IEEE, (2002)Digital post-processing for testable random bit generators., and . ECCTD, page 623-626. IEEE, (2007)Enhancing power analysis attacks against cryptographic devices., , , , , and . IET Circuits Devices Syst., 2 (3): 298-305 (2008)Random Bit Generator.. Encyclopedia of Cryptography and Security (2nd Ed.), Springer, (2011)A countermeasure against differential power analysis based on random delay insertion., , , and . ISCAS (4), page 3547-3550. IEEE, (2005)Design of Testable Random Bit Generators., and . CHES, volume 3659 of Lecture Notes in Computer Science, page 147-156. Springer, (2005)Magia: Robust Automated Image Processing and Kinetic Modeling Toolbox for PET Neuroinformatics., , , , , , , , , and . Frontiers Neuroinformatics, (2020)