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Hardware-Software Coherence Protocol for the Coexistence of Caches and Local Memories., , , , , and . IEEE Trans. Computers, 64 (1): 152-165 (2015)Teaching HPC Systems and Parallel Programming with Small-Scale Clusters., , and . EduHPC@SC, page 1-10. IEEE, (2018)Accelerators in Embedded Systems for Machine Learning: A RISCV View., , and . DCIS, page 1-6. IEEE, (2023)Characterizing the impact of last-level cache replacement policies on big-data workloads., , , and . IISWC, page 134-144. IEEE, (2020)Runtime-assisted cache coherence deactivation in task parallel programs., , , , and . SC, page 35:1-35:12. IEEE / ACM, (2018)Adaptive Power Shifting for Power-Constrained Heterogeneous Systems., , , , , , and . IEEE Trans. Computers, 72 (3): 627-640 (March 2023)Transparent management of scratchpad memories in shared memory programming models.. Polytechnic University of Catalonia, Spain, (2015)A review of CNN accelerators for embedded systems based on RISC-V., , and . COINS, page 1-6. IEEE, (2022)Morrigan: A Composite Instruction TLB Prefetcher., , , , and . MICRO, page 1138-1153. ACM, (2021)Runtime-Guided Management of Scratchpad Memories in Multicore Architectures., , , , , , , and . PACT, page 379-391. IEEE Computer Society, (2015)