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Efficient Parity Prediction in FPGA.

, , и . DFT, стр. 176-181. IEEE Computer Society, (2001)

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Vivien Lo

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Design of Static CMOS Self-Checking Circuits using Built-In Current Sensing., , и . FTCS, стр. 104-111. IEEE Computer Society, (1992)Efficient Realization of Parity Prediction Functions in FPGAs., и . J. Electron. Test., 20 (5): 489-499 (2004)On-Chip Jitter Measurement for Phase Locked Loops., и . DFT, стр. 399-407. IEEE Computer Society, (2002)Efficient Parity Prediction in FPGA., , и . DFT, стр. 176-181. IEEE Computer Society, (2001)Highly Reliable Systems with Differential Built-In Current Sensors.. DFT, стр. 261-269. IEEE Computer Society, (1998)Challenges of Built-In Current Sensor Designs., и . DFT, стр. 192-. IEEE Computer Society, (1998)Building Real Computer Systems., , , , и . IEEE Micro, 20 (3): 48-56 (2000)On-Chip Short-Time Interval Measurement for High-Speed Signal Timing Characterization., и . Asian Test Symposium, стр. 326-331. IEEE Computer Society, (2003)A Novel Technology Mapping Method for AND/XOR Expressions., и . ISMVL, стр. 133-138. IEEE Computer Society, (2003)Concurrent error detection in arithmetic and logical operations using Berger codes., , и . IEEE Symposium on Computer Arithmetic, стр. 233-240. IEEE, (1989)