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Disambiguation of "Bishnoi, Rajendra"

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A cross-layer analysis of Soft Error, aging and process variation in Near Threshold Computing.

, , , , and . DATE, page 205-210. IEEE, (2016)

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Rajendra Persaud

Rajendra Bari

Rajendra Kumar

Rajendra Chandisingh

Rajendra Chandisingh

 

Other publications of authors with the same name

Reliable in-memory neuromorphic computing using spintronics., , and . ASP-DAC, page 230-236. ACM, (2019)Dynamic Faults based Hardware Trojan Design in STT-MRAM., , , and . DATE, page 933-938. IEEE, (2020)Exploiting STT-MRAM for approximate computing., , , , and . ETS, page 1-6. IEEE, (2017)Non-Volatile Non-Shadow flip-flop using Spin Orbit Torque for efficient normally-off computing., , and . ASP-DAC, page 769-774. IEEE, (2016)Low-Power Memristor-Based Computing for Edge-AI Applications., , , , , , and . ISCAS, page 1-5. IEEE, (2021)Low-Power Multi-Port Memory Architecture based on Spin Orbit Torque Magnetic Devices., , and . ACM Great Lakes Symposium on VLSI, page 409-414. ACM, (2016)Special Session - Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield Analysis., , , , , , , , and . VTS, page 1-10. IEEE, (2020)Inkjet-Printed True Random Number Generator based on Additive Resistor Tuning., , , and . DATE, page 1361-1366. IEEE, (2019)Spintronic normally-off heterogeneous system-on-chip design., , and . DATE, page 113-118. IEEE, (2018)Testing Scouting Logic-Based Computation-in-Memory Architectures., , , , , and . ETS, page 1-6. IEEE, (2020)