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Verification and Design Methods for the BrainScaleS Neuromorphic Hardware System.

, , , , and . J. Signal Process. Syst., 92 (11): 1277-1292 (2020)

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Inference with Artificial Neural Networks on Analog Neuromorphic Hardware., , , , , , , , , and 4 other author(s). IoT Streams/ITEM@PKDD/ECML, volume 1325 of Communications in Computer and Information Science, page 201-212. Springer, (2020)Live Demonstration: Versatile Emulation of Spiking Neural Networks on an Accelerated Neuromorphic Substrate., , , , , , , , , and 15 other author(s). ISCAS, page 1. IEEE, (2020)Surrogate gradients for analog neuromorphic computing., , , , , , , , , and 2 other author(s). Proc. Natl. Acad. Sci. USA, 119 (4): e2109194119 (2022)Versatile Emulation of Spiking Neural Networks on an Accelerated Neuromorphic Substrate., , , , , , , , , and 15 other author(s). ISCAS, page 1-5. IEEE, (2020)Training spiking multi-layer networks with surrogate gradients on an analog neuromorphic substrate., , , , , , , , , and 2 other author(s). CoRR, (2020)Demonstrating BrainScaleS-2 Inter-Chip Pulse-Communication using EXTOLL., , , , , and . NICE, page 98-100. ACM, (2022)A Scalable Approach to Modeling on Accelerated Neuromorphic Hardware., , , , , , , , , and 13 other author(s). CoRR, (2022)Verification and Design Methods for the BrainScaleS Neuromorphic Hardware System., , , , and . J. Signal Process. Syst., 92 (11): 1277-1292 (2020)Generative models on accelerated neuromorphic hardware., , , , , , , , , and 14 other author(s). CoRR, (2018)Correction to: Verification and Design Methods for the BrainScaleS Neuromorphic Hardware System., , , , and . J. Signal Process. Syst., 92 (11): 1345 (2020)