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Disambiguation of "Jouppi, Norman P."

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Google's Training Chips Revealed: TPUv2 and TPUv3.

, , , , , , , , and . Hot Chips Symposium, page 1-70. IEEE, (2020)

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Norman Lieber

Schöffengericht und Trial by Jury: eine rechtsvergleichende Untersuchung zur Entstehung, gegenwärtigen Praxis und möglichen Zukunft zweier Modelle der Laienbeteiligung an Strafverfahren in Europa. Uni Leipzig, (2007)

Norman Joesting

Norman Unterhauser

Norman Kreller

Norman Blank

 

Other publications of authors with the same name

MIPS: A microprocessor architecture., , , , , , and . MICRO, page 17-22. ACM/IEEE, (1982)Understanding the trade-offs in multi-level cell ReRAM memory design., , , , and . DAC, page 108:1-108:6. ACM, (2013)BiReality: mutually-immersive telepresence., , , and . ACM Multimedia, page 860-867. ACM, (2004)Telepresence Systems With Automatic Preservation of User Head Height, Local Rotation, and Remote Translation., and . ICRA, page 62-68. IEEE, (2005)Timing analysis for nMOS VLSI.. DAC, page 411-418. ACM/IEEE, (1983)Isolation in Commodity Multicore Processors., , , and . Computer, 40 (6): 49-59 (2007)Introduction to the special issue on the 2005 workshop on design, analysis, and simulation of chip multiprocessors (dasCMP'05)., , and . SIGARCH Comput. Archit. News, 33 (4): 4 (2005)Timing Analysis and Performance Improvement of MOS VLSI Designs.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (4): 650-665 (1987)Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs., , , and . IEEE Comput. Archit. Lett., 8 (1): 5-8 (2009)The Multicluster Architecture: Reducing Processor Cycle Time Through Partitioning., , , and . Int. J. Parallel Program., 27 (5): 327-356 (1999)