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Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors., , , , and . VLSI Design, page 324-329. IEEE Computer Society, (2007)Novel, High-Speed 16-Digit BCD Adders Conforming to IEEE 754r Format., , , , and . ISVLSI, page 343-350. IEEE Computer Society, (2007)What to do about the end of Moore's law, probably!, and . DAC, page 924-929. ACM, (2012)Sustaining moore's law in embedded computing through probabilistic and approximate design: retrospects and prospects., , , , and . CASES, page 1-10. ACM, (2009)Parsimonious Circuits for Error-Tolerant Applications through Probabilistic Logic Minimization., , , and . PATMOS, volume 6951 of Lecture Notes in Computer Science, page 204-213. Springer, (2011)A Novel Encoding Scheme for Delay and Energy Minimization in VLSI Interconnects with Built-In Error Detection., , and . ISVLSI, page 128-133. IEEE Computer Society, (2008)Algorithmic methodologies for ultra-efficient inexact architectures for sustaining technology scaling., , , , , and . Conf. Computing Frontiers, page 3-12. ACM, (2012)Improving energy gains of inexact DSP hardware through reciprocative error compensation., , , , and . DAC, page 20:1-20:8. ACM, (2013)Highly energy-efficient and quality-tunable inexact FFT accelerators., , , and . CICC, page 1-4. IEEE, (2014)Perceptually guided inexact DSP design for power, area efficient hearing aid., , , , , , , , , and . BioCAS, page 1-4. IEEE, (2015)