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Disambiguation of "Paik, Seungwhun"

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Register allocation for high-level synthesis using dual supply voltages.

, , and . DAC, page 937-942. ACM, (2009)

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Tae Seung Paik

Sebastian Paik

Sungjong Paik

Hitzka Paikin

Paul Paikert

 

Other publications of authors with the same name

HAPL: Heterogeneous Array of Programmable Logic Using Selective Mask Patterning., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (1): 146-159 (2014)HLS-dv: A High-Level Synthesis Framework for Dual-Vdd Architectures., , , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (4): 593-604 (2012)Retiming Pulsed-Latch Circuits With Regulating Pulse Width., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (8): 1114-1127 (2011)Retiming and time borrowing: Optimizing high-performance pulsed-latch-based circuits., , and . ICCAD, page 375-380. ACM, (2009)Register allocation for high-level synthesis using dual supply voltages., , and . DAC, page 937-942. ACM, (2009)Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation., , and . ASP-DAC, page 629-634. IEEE, (2008)Clock Gating Synthesis of Pulsed-Latch Circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (7): 1019-1030 (2012)Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power., , and . ICCAD, page 640-646. IEEE Computer Society, (2011)Wakeup synthesis and its buffered tree construction for power gating circuit designs., , and . ISLPED, page 413-418. ACM, (2010)Statistical time borrowing for pulsed-latch circuit designs., , and . ASP-DAC, page 675-680. IEEE, (2010)