( en | de | ru )

 

Disambiguation of "Boroumand, Amirali"

Author of the publication

copydeleteadd this publication to your clipboard
A Workload and Programming Ease Driven Perspective of Processing-in-Memory.

, , , , and . CoRR, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Pegah Boroumand

Amirali Shirazibeheshti

Amirali Sattatrzadeh Mohammadi

 

Other publications of authors with the same name

Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM., , , , , , , , , and . CoRR, (2016)Extending Memory Capacity in Consumer Devices with Emerging Non-Volatile Memory: An Experimental Study., , , , , , , , , and 1 other author(s). CoRR, (2021)Accelerating Neural Network Inference with Processing-in-DRAM: From the Edge to the Cloud., , , , and . CoRR, (2022)Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks., , , , , , , , , and 1 other author(s). ASPLOS, page 316-331. ACM, (2018)Heterogeneous Data-Centric Architectures for Modern Data-Intensive Applications: Case Studies in Machine Learning and Databases., , , , and . ISVLSI, page 273-278. IEEE, (2022)Fast Bulk Bitwise AND and OR in DRAM., , , , , , , and . IEEE Comput. Archit. Lett., 14 (2): 127-131 (2015)Mitigating Edge Machine Learning Inference Bottlenecks: An Empirical Study on Accelerating Google Edge Models., , , , , , , and . CoRR, (2021)LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures., , , , , , , , , and . CoRR, (2017)Practical Mechanisms for Reducing Processor-Memory Data Movement in Modern Workloads.. Carnegie Mellon University, USA, (2021)A generic FPGA prototype for on-chip systems with network-on-chip communication infrastructure., , and . Comput. Electr. Eng., 40 (1): 158-167 (2014)