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Evaluation of state-of-the-art neural network customized hardware., and . Neurocomputing, 2 (5): 209-231 (1990)Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters., , , , and . VLSI-SoC, page 302-307. IEEE, (2006)Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique., and . ISCAS, IEEE, (2006)Design of an efficient OFDM burst synchronization scheme., , and . ISCAS (3), page 449-452. IEEE, (2002)Automatic generation of a fuzzy classification system using fuzzy clustering methods., and . SAC, page 180-183. ACM, (1994)A New Approach for Designing Fault-Tolerant Array Processors., and . Fault-Tolerant Computing Systems, volume 283 of Informatik-Fachberichte, page 324-331. Springer, (1991)Compact image compression using simplicial and ART neural systems with mixed signal implementations., , and . ISCAS (5), page 689-692. IEEE, (2003)A low power sinusoidal clock., and . ISCAS (4), page 108-111. IEEE, (2001)Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans., , and . VLSI-SoC (Selected Papers), volume 200 of IFIP, page 149-164. Springer, (2003)Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models., and . SBCCI, page 330-335. ACM, (2007)