( en | de | ru )

 

Disambiguation of "Kim, Keejong"

Author of the publication

copydeleteadd this publication to your clipboard
A Low-Power SRAM Using Bit-Line Charge-Recycling.

, , and . IEEE J. Solid State Circuits, 43 (2): 446-459 (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ky ng Kim

Die Artikelstruktur in passiven zweisprachigen Wörterbüchern Deutsch-Koreanisch: Konzeption zur Erstellung eines zweisprachigen Lernerwörterbuchs Deutsch-Koreanisch. Uni Heidelberg, (2008)

Baeckpyeng Kim

Zaezeung Kim

Kim Gerber

Bongcheol Kim

 

Other publications of authors with the same name

Design of a Process Variation Tolerant Self-Repairing SRAM for Yield Enhancement in Nanoscaled CMOS., , , and . IEEE J. Solid State Circuits, 42 (6): 1370-1382 (2007)A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM., , and . IEEE J. Solid State Circuits, 42 (10): 2303-2313 (2007)TFT-LCD Application Specific Low Power SRAM Using Charge-Recycling Technique., , and . ISQED, page 59-64. IEEE Computer Society, (2005)Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop., , and . DAC, page 934-939. IEEE, (2007)A low-power SRAM using bit-line charge-recycling technique., , and . ISLPED, page 177-182. ACM, (2007)A 160 mV, fully differential, robust schmitt trigger based sub-threshold SRAM., , and . ISLPED, page 171-176. ACM, (2007)FinFET Based SRAM Design for Low Standby Power Applications., , and . ISQED, page 127-132. IEEE Computer Society, (2007)Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM., , , and . DAC, page 971-976. ACM, (2006)Process variation tolerant SRAM array for ultra low voltage applications., , , and . DAC, page 108-113. ACM, (2008)On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures., , , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (2): 270-280 (2010)