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Failure mechanisms and test methods for the SRAM TVC write-assist technique., , , and . ETS, page 1-2. IEEE, (2016)Memory error resilient detection for massive MIMO systems., and . EUSIPCO, page 1623-1627. IEEE, (2016)Secure Composition for Hardware Systems (Dagstuhl Seminar 19301)., , , and . Dagstuhl Reports, 9 (7): 94-116 (2019)Selective Hardening: Toward Cost-Effective Error Tolerance., and . IEEE Des. Test Comput., 28 (3): 54-63 (2011)An Open-Source Area-Optimized ECEG Cryptosystem in Hardware., , and . ISVLSI, page 120-125. IEEE, (2020)Protecting artificial intelligence IPs: a survey of watermarking and fingerprinting for machine learning., , , , and . CAAI Trans. Intell. Technol., 6 (2): 180-191 (2021)Test and Reliability Challenges for Approximate Circuitry.. IEEE Embed. Syst. Lett., 10 (1): 26-29 (2018)Toward Error-Correcting Architectures for Cryptographic Circuits Based on Rabii-Keren Codes., , , and . IEEE Embed. Syst. Lett., 11 (4): 115-118 (2019)Exploring the Mysteries of System-Level Test., , , , , , , , , and . CoRR, (2021)Physics inspired compact modelling of BiFeO$_3$ based memristors for hardware security applications., , , , , , and . CoRR, (2022)