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I/O Pad Assignment Based on the Circuit Structure.

, , и . ICCD, стр. 314-318. IEEE Computer Society, (1991)

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Wilhelm Kuh

Willi Kuh

Ernest Koch

Ernest Boles

Ernest Molua

 

Другие публикации лиц с тем же именем

A new performance-driven global routing algorithm for gate array., , и . VLSI, том A-42 из IFIP Transactions, стр. 321-330. North-Holland, (1993)SWEC: a Step Wise Equivalent Conductance timing simulator for CMOS VLSI circuits., , и . EURO-DAC, стр. 142-148. EEE Computer Society, (1991)Performance-Driven Steiner Tree Algorithm for Global Routing., , , , и . DAC, стр. 177-181. ACM Press, (1993)A Dynamic and Efficient Representation of Building-Block Layout., , и . DAC, стр. 376-384. IEEE Computer Society Press / ACM, (1987)Simultaneous Floor Planning and Global Routing for Hierarchical Building-Block Layout., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (5): 828-837 (1987)Basic Circuit Theory, и . Tate McGrawHill, New Delhi, (2010)Accurate reduced RL model for frequency dependent transmission lines., и . ICECS, стр. 761-764. IEEE, (2002)Design methodology of high performance on-chip global interconnect using terminated transmission-line., , , , , , , и . ISQED, стр. 451-458. IEEE Computer Society, (2009)Floorplanning with Pin Assignment., , и . ICCAD, стр. 98-101. IEEE Computer Society, (1990)Post global routing crosstalk risk estimation and reduction., , и . ICCAD, стр. 302-309. IEEE Computer Society / ACM, (1996)