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FP-BNN: Binarized neural network on FPGA., , , , and . Neurocomputing, (2018)Towards Real Time Radiotherapy Simulation., , , , , , , and . J. Signal Process. Syst., 92 (9): 949-963 (2020)Scheduling Hardware-Accelerated Cloud Functions., , and . J. Signal Process. Syst., 93 (12): 1419-1431 (2021)Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator., , , , , , and . ASP-DAC, page 250-255. IEEE, (2022)CusComNet: A customisable network for reconfigurable heterogeneous clusters., , , and . ASAP, page 9-16. IEEE Computer Society, (2011)HW/SW partitioning for region-based dynamic partial reconfigurable FPGAs., , , and . ICCD, page 470-476. IEEE Computer Society, (2014)Acceleration of real-time Proximity Query for dynamic active constraints., , , , , , , and . FPT, page 206-213. IEEE, (2013)A partially reconfigurable architecture supporting hardware threads., , , , , , and . FPT, page 269-276. IEEE, (2012)Using Reconfigurable Logic to Optimise GPU Memory Accesses., , and . DATE, page 44-49. ACM, (2008)High-Performance FPGA Network Switch Architecture., , and . FPGA, page 76-85. ACM, (2020)