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Static thread mapping for NoCs via binary instrumentation traces.

, , , , and . ICCD, page 517-520. IEEE Computer Society, (2014)

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The Case for Power-Agile Computing., and . HotOS, USENIX Association, (2011)Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization., , , and . IEEE Comput. Archit. Lett., 14 (1): 30-33 (2015)System design considerations for sensor network applications., , and . ISCAS, page 2566-2569. IEEE, (2008)RecNMP: Accelerating Personalized Recommendation with Near-Memory Processing., , , , , , , , , and 11 other author(s). CoRR, (2019)CASHT: Contention Analysis in Shared Hierarchies with Thefts., , and . ACM Trans. Archit. Code Optim., 19 (1): 12:1-12:27 (2022)Effects of Nondeterminism in Hardware and Software Simulation with Thread Mapping., , , , and . VLSID, page 129-134. IEEE Computer Society, (2015)Power-agility metrics: Measuring dynamic characteristics of energy proportionality., and . ICCD, page 643-650. IEEE Computer Society, (2015)Register allocation and VDD-gating algorithms for out-of-order architectures., and . ICCD, page 108-114. IEEE Computer Society, (2013)Characterizing the costs and benefits of hardware parallelism in accelerator cores., and . ICCD, page 26-32. IEEE Computer Society, (2013)Metrics for Early-Stage Modeling of Many-Accelerator Architectures., , and . IEEE Comput. Archit. Lett., 12 (1): 25-28 (2013)