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Self-configuring spiking neural networks., , and . IEICE Electron. Express, 5 (22): 921-926 (2008)A Compact Double-Exponential Circuit for Single Event Transient Emulation., , , , , , and . DCIS, page 1-6. IEEE, (2023)A Fully CMOS Low-Cost Chaotic Neural Network., , , , and . IJCNN, page 659-663. IEEE, (2006)A simple CMOS chaotic integrated circuit., , , , and . IEICE Electron. Express, 5 (24): 1042-1048 (2008)A BIST-based Charge Analysis for Embedded Memories., , , and . IOLTS, page 199-206. IEEE Computer Society, (2004)Accurate alpha soft error rate evaluation in SRAM memories., , , , and . IOLTS, page 205-209. IEEE, (2013)Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments., , , , , and . VTS, page 286-291. IEEE Computer Society, (2001)SRAM Alpha-SER Estimation From Word-Line Voltage Margin Measurements: Design Architecture and Experimental Results., , , , and . CoRR, (2024)Using stochastic logic for efficient pattern recognition analysis., , , and . IJCNN, page 1057-1061. IEEE, (2008)On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor., , , and . IOLTW, page 87-91. IEEE Computer Society, (2000)