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Low normalized energy derivation asynchronous circuit synthesis flow through fork-join slack matching for cryptographic applications.

, , , , and . DATE, page 850-853. IEEE, (2016)

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High robustness energy- and area-efficient dynamic-voltage-scaling 4-phase 4-rail asynchronous-logic Network-on-Chip (ANoC)., , , , and . ISCAS, page 1913-1916. IEEE, (2015)Synthesis of asynchronous QDI circuits using synchronous coding specifications., , , , and . ISCAS, page 153-156. IEEE, (2014)Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operation., , , , , and . ISCAS, page 1936-1939. IEEE, (2011)Dual-Hiding Side-Channel-Attack Resistant FPGA-Based Asynchronous-Logic AES: Design, Countermeasures and Evaluation., , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 11 (2): 343-356 (2021)A Comparative Analysis of 65nm CMOS SRAM and Commercial SRAMs in Security Vulnerability Evaluation., , , and . DSP, page 1-5. IEEE, (2018)Normalized Differential Power Analysis - for Ghost Peaks Mitigation., , , , , , , , and . ISCAS, page 1-5. IEEE, (2021)High Throughput and Secure Authentication-Encryption on Asynchronous Multicore Processor for Edge Computing IoT Applications., , , , and . ISOCC, page 173-174. IEEE, (2020)A dual-core 8051 microcontroller system based on synchronous-logic and asynchronous-logic., , , , , and . ISCAS, page 3022-3025. IEEE, (2013)A Secure Data-Toggling SRAM for Confidential Data Protection., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (11): 4186-4199 (2019)A High Throughput and Secure Authentication-Encryption AES-CCM Algorithm on Asynchronous Multicore Processor., , , , and . IEEE Trans. Inf. Forensics Secur., 14 (4): 1023-1036 (2019)