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Disambiguation of "Ishizaki, Masakatsu"

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Application of Multi-ported CAM for Parallel Coding.

, , , , and . APCCAS, page 1859-1862. IEEE, (2006)

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Masato Ishizaki

Masakatsu Fujita

 

Other publications of authors with the same name

Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor., , , , , , , , , and . IEICE Trans. Electron., 91-C (9): 1409-1418 (2008)A scalable massively parallel processor for real-time image processing., , , , , , , , , and 3 other author(s). ISSCC, page 334-335. IEEE, (2010)Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory., , , , and . IEICE Trans. Inf. Syst., 90-D (1): 346-354 (2007)Software-Based Parallel Cryptographic Solution with Massive-Parallel Memory-Embedded SIMD Matrix Architecture for Data-Storage Systems., , , , and . IEICE Trans. Inf. Syst., 94-D (9): 1742-1754 (2011)Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (8): 1312-1315 (2007)Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer., , , , , , , , and . IEICE Trans. Inf. Syst., 90-D (1): 334-345 (2007)Application of Multi-ported CAM for Parallel Coding., , , , and . APCCAS, page 1859-1862. IEEE, (2006)A Scalable Massively Parallel Processor for Real-Time Image Processing., , , , , , , , , and 9 other author(s). IEEE J. Solid State Circuits, 46 (10): 2363-2373 (2011)