Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Virtualized Reconfigurable Hardware Resources in the SAVI Testbed., , , , and . TRIDENTCOM, volume 137 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 54-64. Springer, (2014)Enabling network function virtualization over heterogeneous resources., , , , and . APNOMS, page 58-63. IEEE, (2017)The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System., , , , and . FPGA, page 53-61. ACM, (1997)A Modular Heterogeneous Stack for Deploying FPGAs and CPUs in the Data Center., , , and . FPGA, page 262-271. ACM, (2019)Optimization of data prefetch helper threads with path-expression based statistical modeling., and . ICS, page 210-221. ACM, (2007)Disaggregated Memory in the Datacenter: A Survey., and . IEEE Access, (2023)FPGA Implementation of an Improved OMP for Compressive Sensing Reconstruction., , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (2): 259-272 (2021)NetThreads-10G: Software packet processing on NetFPGA-10G in a virtualized networking environment demonstration abstract., , and . FPL, page 1. IEEE, (2013)RACER: a reconfigurable constraint-length 14 Viterbi decoder., , and . FCCM, page 60-69. IEEE, (1996)An efficient FPGA implementation of QR decomposition using a novel systolic array architecture based on enhanced vectoring CORDIC., , and . FPT, page 123-130. IEEE, (2014)