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Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources.

, , and . MICRO, page 90-101. ACM/IEEE Computer Society, (2001)

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Dynamic Capping of Physical Register Files in Simultaneous Multi-threading Processors for Performance., and . ISCIS, volume 935 of Communications in Computer and Information Science, page 41-48. Springer, (2018)Memory Partitioning in the Limit., , , and . Int. J. Parallel Program., 44 (2): 337-380 (2016)Last level cache partitioning via multiverse thread classification., , , and . Turkish J. Electr. Eng. Comput. Sci., 26 (1): 220-233 (2018)Distributed Reorder Buffer Schemes for Low Power., , , and . ICCD, page 364-370. IEEE Computer Society, (2003)Allocation of last level cache partitions through thread classification with parallel universes., , , and . HPCS, page 204-212. IEEE, (2016)Energy: efficient instruction dispatch buffer design for superscalar processors., , , and . ISLPED, page 237-242. ACM, (2001)Reducing Energy Dissipation of Wireless Sensor Processors Using Silent-Store-Filtering MoteCache., and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 256-266. Springer, (2006)Energy-efficient issue queue design., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 11 (5): 789-800 (2003)A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors., , , and . ICCD, page 118-121. IEEE Computer Society, (2002)FireSenseTB: a wireless sensor networks testbed for forest fire detection., , , and . IWCMC, page 1173-1177. ACM, (2009)