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SubMac: Exploiting the subword-based computation in RRAM-based CNN accelerator for energy saving and speedup.

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A low power Viterbi decoder implementation using scarce state transition and path pruning scheme for high throughput wireless applications., and . ISLPED, page 406-411. ACM, (2006)A traffic-aware adaptive routing algorithm on a highly reconfigurable network-on-chip architecture., , , , and . CODES+ISSS, page 161-170. ACM, (2012)A Two-Staged Adaptive Successive Cancellation List Decoding for Polar Codes., , and . ISCAS, page 1-5. IEEE, (2019)An efficient Network-on-Chip (NoC) based multicore platform for hierarchical parallel genetic algorithms., , , , , and . NOCS, page 17-24. IEEE, (2014)A thermal-aware application specific routing algorithm for Network-on-Chip design., and . ASP-DAC, page 449-454. IEEE, (2011)Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO., and . VLSI-SoC, page 1-5. IEEE, (2016)A fault-tolerant network-on-chip design using dynamic reconfiguration of partial-faulty routing resources., , and . VLSI-SoC, page 192-195. IEEE, (2011)An Energy Efficient Layered Decoding Architecture for LDPC Decoder., and . IEEE Trans. Very Large Scale Integr. Syst., 18 (8): 1185-1195 (2010)The Design of a Micro Power Management System for Applications Using Photovoltaic Cells With the Maximum Output Power Control., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (8): 1138-1142 (2009)Design of Sub-Gigahertz Reconfigurable RF Energy Harvester From -22 to 4 dBm With 99.8% Peak MPPT Power Efficiency., , , , , , , and . IEEE J. Solid State Circuits, 54 (9): 2601-2613 (2019)