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28nm Fault-Tolerant Hardening-by-Design Frequency Divider for Reducing Soft Errors in Clock and Data Recovery.

, , , , , and . IEEE Access, (2019)

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A 40nm/65nm process adaptive low jitter phase-locked loop., , and . ISIC, page 500-503. IEEE, (2014)A Radiation-Immune Low-Jitter High-Frequency PLL for SerDes., , , and . NCCET, volume 600 of Communications in Computer and Information Science, page 45-51. Springer, (2017)A radiation hardened low-noise voltage-controlled-oscillator using negative feedback based multipath- current-releasing technology., , , and . ASICON, page 241-244. IEEE, (2017)28nm Fault-Tolerant Hardening-by-Design Frequency Divider for Reducing Soft Errors in Clock and Data Recovery., , , , , and . IEEE Access, (2019)A Single-Event Transient Radiation Hardened Low-Dropout Regulator for LC Voltage-Controlled Oscillator., , , and . Symmetry, 14 (4): 788 (2022)Analysis of Single Events Effects on Supply-Regulated LC-Tank Voltage-Controlled Oscillator., , , , and . ASICON, page 1-4. IEEE, (2021)A low-jitter self-biased phase-locked loop for SerDes., , , , , and . ISOCC, page 59-60. IEEE, (2016)A state recovery design against single-event transient in high-speed phase interpolation clock and data recovery circuit., , , , and . ASICON, page 339-342. IEEE, (2017)An adaptive multi-modulus frequency divider., , and . ASICON, page 1-4. IEEE, (2013)