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Robust System Design., , , , , , , , , and 4 other author(s). IPSJ Trans. Syst. LSI Des. Methodol., (2011)The resilience wall: Cross-layer solution strategies., , , , , , , , , and 3 other author(s). VLSI-DAT, page 1-11. IEEE, (2014)System-Level Effects of Soft Errors in Uncore Components., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (9): 1497-1510 (2017)Probabilistic analysis of Gallager B faulty decoder., , , , and . ICC, page 7019-7023. IEEE, (2012)ES4D: Accelerating Exact Similarity Search for High-Dimensional Vectors via Vector Slicing and In-SSD Computation., , , , , and . ICCD, page 298-306. IEEE, (2022)Modeling Application-Level Soft Error Effects for Single-Event Multi-Bit Upsets., and . IEEE Access, (2019)GPU-based acceleration of the Linear Complexity Test for random number generator testing., , and . J. Parallel Distributed Comput., (2019)Gallager B Decoder on Noisy Hardware., , and . IEEE Trans. Commun., 61 (5): 1660-1673 (2013)Correction to ÄSIC-Resistance of Multi-Hash Proof-of-Work Mechanisms for Blockchain Consensus Protocols".. IEEE Access, (2019)FA3C: FPGA-Accelerated Deep Reinforcement Learning., , , , and . ASPLOS, page 499-513. ACM, (2019)