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Disambiguation of "Cheng, Lerong"

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Device and Architecture Cooptimization for FPGA Power Reduction.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (7): 1211-1221 (2007)

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Cheng-Yung Cheng

Ying Min Cheng

I-Fen Cheng

Yao Cheng

Qing-Qi Cheng

 

Other publications of authors with the same name

A combinatorial congestion estimation approach with generalized detours., , , , , , and . Comput. Math. Appl., 51 (6-7): 1113-1126 (2006)A Hierachical Method for Wiring and Congestion Prediction., , , , , , and . ISVLSI, page 307-308. IEEE Computer Society, (2005)Non-Gaussian statistical timing analysis using second-order polynomial fitting., , and . ASP-DAC, page 298-303. IEEE, (2008)A fast congestion estimator for routing with bounded detours., , , and . ASP-DAC, page 666-670. IEEE Computer Society, (2004)Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources., , and . DAC, page 250-255. IEEE, (2007)Device and Architecture Cooptimization for FPGA Power Reduction., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (7): 1211-1221 (2007)On confidence in characterization and application of variation models., , and . ASP-DAC, page 751-756. IEEE, (2010)FPGA Performance Optimization Via Chipwise Placement Considering Process Variations., , , and . FPL, page 1-6. IEEE, (2006)FPGA device and architecture evaluation considering process variations., , , and . ICCAD, page 19-24. IEEE Computer Society, (2005)Digital spectrum of a nonuniformly sampled two-dimensional signal and its reconstruction., and . IEEE Trans. Instrumentation and Measurement, 54 (3): 1180-1187 (2005)