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Architectural Modifications to Improve Floating-Point Unit Efficiency in FPGAs., , , and . FPL, page 1-6. IEEE, (2006)Unveiling the Interplay Between Global Link Arrangements and Network Management Algorithms on Dragonfly Networks., , , , and . CCGrid, page 325-334. IEEE Computer Society / ACM, (2017)Source Level Debugger for the Sea Cucumber Synthesizing Compiler., , , and . FCCM, page 228-. IEEE Computer Society, (2003)Open Source High Performance Floating-Point Modules., and . FCCM, page 349-350. IEEE Computer Society, (2006)Using a complementary emulation-simulation co-design approach to assess application readiness for processing-in-memory systems., , , , and . Co-HPC@SC, page 64-71. IEEE, (2014)A Hardware Acceleration Unit for MPI Queue Processing., , , , and . IPDPS, IEEE Computer Society, (2005)High message rate, NIC-based atomics: Design and performance considerations., , , and . CLUSTER, page 133-141. IEEE Computer Society, (2008)(SAI) Stalled, Active and Idle: Characterizing Power and Performance of Large-Scale Dragonfly Networks., , , , , and . CLUSTER, page 50-59. IEEE Computer Society, (2016)Enhanced Support for OpenSHMEM Communication in Portals., , , , , and . Hot Interconnects, page 61-69. IEEE Computer Society, (2011)Enabling Flexible Collective Communication Offload with Triggered Operations., , , , , , and . Hot Interconnects, page 35-42. IEEE Computer Society, (2011)