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FXA: Executing Instructions in Front-End for Energy Efficiency., , , and . IEICE Trans. Inf. Syst., 99-D (4): 1092-1107 (2016)Unconstrained Speculative Execution with Predicated State Buffering., , , and . ISCA, page 126-137. ACM, (1995)Speculative Execution and Reducing Branch Penalty in a Parallel Issue Machine., , , , , and . ICCD, page 106-113. IEEE Computer Society, (1993)Register File Size Reduction through Instruction Pre-Execution Incorporating Value Prediction., and . IEICE Trans. Inf. Syst., 93-D (12): 3294-3305 (2010)Segmenting Age Matrices to Improve Instruction Scheduling without Increasing Delay and Area.. ICCD, page 360-363. IEEE, (2022)Performance Improvement by Prioritizing the Issue of the Instructions in Unconfident Branch Slices.. MICRO, page 82-94. IEEE Computer Society, (2018)A Front-End Execution Architecture for High Energy Efficiency., , and . MICRO, page 419-431. IEEE Computer Society, (2014)Performance Improvement Techniques in Tightly Coupled Multicore Architectures for Single-Thread Applications., , and . J. Inf. Process., (2018)SWQUE: A Mode Switching Issue Queue with Priority-Correcting Circular Queue.. MICRO, page 506-518. ACM, (2019)Energy-Efficient Pre-Execution Techniques in Two-Step Physical Register Deallocation., , and . IEICE Trans. Inf. Syst., 92-D (11): 2186-2195 (2009)