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Disambiguation of "Bardsley, Scott"

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A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither.

, , , , , , , , , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)

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Martina Christine Scotti

Pierre-François Scotto

Peter Scott

Felix Markus Hubertus Scotti

James Wesley Scott

 

Other publications of authors with the same name

A frequency agile monolithic QPSK modulator with spectral filtering and 75 Ω differential line driver., , , , and . IEEE J. Solid State Circuits, 33 (9): 1394-1405 (1998)A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration., , , , , , , and . IEEE J. Solid State Circuits, 55 (12): 3210-3224 (2020)A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration., , , , , , , , , and 3 other author(s). ISSCC, page 292-293. IEEE, (2010)16.1 A 12b 18GS/s RF Sampling ADC with an Integrated Wideband Track-and-Hold Amplifier and Background Calibration., , , , , , , , , and . ISSCC, page 250-252. IEEE, (2020)A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither., , , , , , , , , and 7 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)A 14-bit 125 MS/s IF/RF sampling pipelined A/D converter., , , , , , and . CICC, page 391-394. IEEE, (2005)A Tiered Security System for Mobile Devices, , and . CoRR, (2008)A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter., , , , , , and . IEEE J. Solid State Circuits, 41 (8): 1846-1855 (2006)A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 45 (12): 2602-2612 (2010)A 100-dB SFDR 80-MSPS 14-Bit 0.35-$ muhbox m$BiCMOS Pipeline ADC., , , , , , and . IEEE J. Solid State Circuits, 41 (9): 2144-2153 (2006)