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Propagation of Last-Transition-Time Constraints in Gate-Level Timing Analysis.

, , , and . DATE, page 796-802. IEEE Computer Society, (1998)

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Modeling Cell Processing Hardware with Action Diagrams., and . ISCAS, page 245-248. IEEE, (1994)A Class of Test Generators for Built-In Testing., and . IEEE Trans. Computers, 32 (10): 957-959 (1983)Optimization-based multifrequency test generation for analog circuits., , and . J. Electron. Test., 9 (1-2): 59-73 (1996)Solving Linear, Min and Max Constraint Systems Using CLP based on Relational Interval Arithmetic., , and . CP, volume 976 of Lecture Notes in Computer Science, page 186-203. Springer, (1995)Verification of Real Time Controllers Against Timing Diagram Specifications Using Constraint Logic Programming., and . EUROMICRO, page 10229-10236. IEEE Computer Society, (1998)Compositional verification of an ATM switch module using interface recognizer/suppliers (IRS)., and . HLDVT, page 71-76. IEEE Computer Society, (2000)Design by similarity using transaction modeling and statistical techniques., , , and . EURO-DAC, page 464-468. EEE Computer Society, (1991)MDG-based Verification by Retiming and Combinational Transformations., , and . Great Lakes Symposium on VLSI, page 356-361. IEEE Computer Society, (1998)Local microcode generation in system design., , , and . Code Generation for Embedded Processors, page 171-187. Kluwer, (1994)CHESHIRE: An Object-Oriented Integration of VLSI CAD Tools., , , and . DAC, page 750-756. IEEE Computer Society Press / ACM, (1987)